High Speed Implementation of 16 & 32 Bit Multiplication in MCMA Block of Fir Filter Using Column Compression Multipliers & Hybrid Adder
نویسندگان
چکیده
منابع مشابه
Bit-Level Optimization of Adder-Trees for Multiple Constant Multiplication FIR Filter Implementation
Multiple constant multiplication (MCM) scheme is widely used for implementing transposed direct-form FIR filters. While the research focus of MCM has been on more effective common subexpression elimination, the optimization of addertrees, which sum up the computed sub-expressions for each coefficient, is largely omitted. In this paper, we have identified the resource minimization problem in the...
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ژورنال
عنوان ژورنال: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
سال: 2014
ISSN: 2320-3765,2278-8875
DOI: 10.15662/ijareeie.2014.0309028